Rehan Kapadia
Director MOSIS 2.0
Your Gateway to Rapid Prototyping
Don't miss our upcoming MPW tapeout dates!
| Foundry Service | Technology Node | Tapeout Date |
|---|---|---|
| Win Semiconductor | NP12-1B | 12/10/2026 |
Nanofab Prototyping
Rapid prototyping and process development capability through access to seven university nanofabrication facilities and other experimental prototyping facilities within the Southern California area and throughout the nation.
MPW Services
Supporting both silicon CMOS and advanced compound semiconductor technologies with seamless access to a wide array of commercial silicon MPW services from leading large, medium, and small-volume foundries.
IC Design
Providing comprehensive chip design services that simplify and streamline the development process, enabling customers to bring their innovative ideas from concept to silicon.
Test and Modeling
The SWAP Hub provides a suite of test and modeling services to evaluate materials, devices, packages, and full systems across a wide range of environments for mission-critical applications.
Meet Us in Person At:
IEDM 2026
MOSIS 2.0: Booth 11
Hilton San Francisco Union Square
San Francisco, CA
December 12-16, 2026
MOSIS 2.0 Feed
Engaging with MOSIS 2.0
MOSIS 2.0 is the central storefront and gateway to access cutting-edge prototyping services, targeting advanced RF, 5G/6G, and EW applications.
The Prototype Integration and Engineering Service (PIES) Team is at the core of MOSIS 2.0 - a dedicated fab-knowledgeable engineering group that supports designers to accelerate their innovations to solutions.
- Internal "Pipe Cleaner" Projects: PIES-led prototyping to optimize workflows, methods, and infrastructure
- Externally Funded Prototyping: Rapid process and chip development for defense/commercial partners
- Process Characterization & Analytics: Metrics, statistical analysis, and modeling with PDF Solutions
- Small-Volume Fabrication Services: Flexible access to design/development via Fabublox on MOSIS Storefront
- MPW & EDA Services: Efficient prototyping through DoW/Commercial foundries with MPW and design tools.
We invite innovators, researchers, and industry partners to engage with MOSIS 2.0-and join us in advancing next-generation microelectronics.
Meet the Team
Christine Lee
Fab Prototyping Services Manager
Damon McCaskill
Senior Project Manager
Jeung Hun Park
Microelectronics Fabrication Engineering Manager
The challenge invites novel designs using Northrop Grumman’s FORTITUDE™, a Super Lattice Castellated Field Effect Transistor (SLCFET) switch/amplifier technology and radiation-hard 0.8 µm CMOS process. Potential applications include reconfigurable RF circuits, wideband amplifiers and radiation-hard electronics.
Selected proposals will receive $10K–$20K in unrestricted basic research funding. Northrop Grumman will also cover fabrication costs, with chips sent to submitters for testing upon completion.
The program also offers successful applicants a wealth of resources via our MOSIS 2.0 storefront, with the MOSIS 2.0 team available to onboard, train and guide designers.
Proposals will be evaluated on design novelty, feasibility and transition opportunities. Researchers with more complex concepts can also propose architecture studies that could lead to a future MPW run.
📅 Proposal submission deadline: November 23, 2026.
🔗 Submit your proposal here: https://lnkd.in/g-Gt3jiB
For questions and submission information, please reach out to Ishan Wathuthanthri at Ishan.Wathuthanthri@ngc.com.
We look forward to helping researchers explore new ideas and advance microelectronics innovation!
Image credit: Northrop Grumman
MOSIS 2.0 is proud to be part of that discussion at “Frontiers of AI-Driven Circuits, Chips & Semiconductors,” a day-long workshop at the AIAS+ Symposium in San Francisco on Friday, November 6.
MOSIS 2.0 Director Rehan Kapadia will join as a panelist alongside researchers and industry leaders exploring AI’s potential to advance chip design and enable foundational discoveries.
At MOSIS 2.0, we help innovators turn ideas into working hardware. We’re excited to explore how AI-driven discovery could open new possibilities for semiconductor design and prototyping.
If you're at AIAS+, join us for the conversation!
📅 Friday, November 6
📍 Ritz-Carlton, San Francisco
Explore the workshop: falconailab.com/workshop
Register for AIAS+: aiasplus.org
The MOSIS 2.0 team is on the ground in Orlando alongside UC San Diego and ready to connect with the biomedical engineering community.
Stop by Booth 221 and meet Eugene Yoon, Microelectronics Fabrication & Process Integration Engineer at MOSIS 2.0, to discover how we can help accelerate your MedTech innovations.
We’ll be here through Saturday, October 24. Come say hello!
Learn more: https://lnkd.in/dzADd4Zv
We’re especially grateful for his vision and leadership in helping reinvent MOSIS as MOSIS 2.0. We’re proud to see it recognized among the highlights of his tenure and look forward to building on that legacy.
The former Michael Keston Executive Director of ISI and former vice dean of engineering at the USC Viterbi School of Engineering will continue as a distinguished principal scientist and research professor of computer science and spatial sciences, pursuing ambitious AI research with real-world impact.
Read about his leadership, legacy and next chapter: https://lnkd.in/gK7t4EmX
We’ll be attending the BMES Annual Meeting in Orlando alongside our colleagues from UC San Diego.
Stop by Booth 221 and connect with Eugene Yoon, Microelectronics Fabrication & Process Integration Engineer at MOSIS 2.0, to discover how MOSIS 2.0 can help accelerate your MedTech innovations.
📅 October 21–24
📍 Orlando, Florida
🔹 Booth 221
Learn more and register: https://lnkd.in/dzADd4Zv